Physics 234:  Digital Electronics (TT section)

Fall 2017

Jed Brody (N308, 7-5580, jbrody@emory.edu)

Logic is the beginning of wisdom, not the end.

—Mr. Spock

In digital electronics, voltages are restricted to just two values, represented as 0 and 1.  Amazingly, combinations of these two numbers govern all modern technology.  This course introduces combinational and sequential logic.  Students will acquire and apply a detailed understanding of all of the following:  Boolean algebra, K maps, combinational circuits including multiplexers and arithmetic logic units, sequential circuits containing flip-flops and counters, and circuits that transmit and receive serial data.  Students will develop skills in Verilog, a hardware description language used in industry to implement circuits containing thousands or millions of logic gates.

Grades will be determined as follows:

Project 1:  due October 17                                           25%

Project 2:  due December 7                                          25%

Test 1, Test 2                                                               25% each

Statement from the Department of Physics:  We are all here in this class for the same reason:  to learn physics.  It is unacceptable to judge your fellow students by gender, race, or anything else.  Please treat your classmates with respect both in and out of the classroom.  If you have any concerns please talk with the teacher or the department chair, Prof. Eric Weeks.

 Date Topics Book chapters Class activity Aug. 24 Logic gates 1, 2.1 Lab 1 Aug. 29 Boolean algebra 2.2, 3.1 Lab 1 Aug. 31 Implementing truth tables 2.3, 2.4 Lab 2 Sept. 5 Transistors 4.1, 4.4 Lab 2 Sept. 7 K maps 3.2 Lab 3 Sept. 12 Binary arithmetic Appendix B Lab 3 Sept. 14 Multiplexers 5.1 Lab 4 Sept. 19 7-segment displays 5.2 Lab 4 Sept. 21 Shifters and comparators 5.3, 6.3 Lab 5 Sept. 26 Adders and subtractors 6.1, 6.2 Lab 5 Sept. 28 TEST 1:  Combinational logic Oct. 3 Glitches and latches 7.1, Example 11 Project 1 Oct. 5 Flip-flops 7.1 Project 1 Oct. 12 Counters 7.4 Project 1 Oct. 17 Clock dividers Example 52 Lab 6 Oct. 19 Switch debouncers Examples 47, 48 Lab 6 Oct. 24 Multiplexing displays Example 14 Lab 6 Oct. 26 Moore machines 8.1, 8.2 Lab 7 Oct. 31 Mealy machines 8.3 Lab 7 Nov. 2 Receive serial data Lab 7 Nov. 7 Transmit serial data Lab 8 Nov. 9 Transmit multiple bytes Lab 8 Nov. 14 Receive data in Python Lab 8 Nov. 16 TEST 2:  Sequential logic Nov. 21 Memory 11 Lab 9 Nov. 28 Microprocessors de Pablo et al. Lab 9 Nov. 30 Instruction sets de Pablo et al. Project 2 Dec. 5 Microprocessor interfacing de Pablo et al. Project 2

Textbook:  Haskell and Hanna, Digital Design Using Digilent FPGA Boards—Verilog/Active-HDL Edition, Second Edition, 2012, ISBN 978-0-9801337-7-6.

Supplemental texts: